As shown in Figure 4, the MC6809E adds three registers to the set available in the MC6800. The added registers include a direct page register, the user stack pointer, and a second index register.
FIGURE 4 - PROGRAMMING MODEL OF THE MICROPROCESSING UNIT
15 8 7 0 X Index register Y Index register U User Stack Pointer S Hardware Stack Pointer PC Program Counter D A B Accumulators DP Direct Page - - - - - - - - - CCR E F H I N Z V C Condition Code Register
The A and B registers are general purpose accumulators which are used for arithmetic calculations and manipulation of data.
Certain instructions concatenate the A and B registers to form a single 16-bit accumulator. This is referred to as the D register, and is formed with the A register as the most significant byte.
The direct page register of the MC6809E serves to enhance the direct addressing mode. The content of this register appears at the higher address outputs (A8-A15) during direct addressing instruction execution. This allows the direct mode to be used at any place in memory, under program control. To ensure M6800 compatibility, all bits of this register are cleared during processor reset.
The index registers are used in indexed mode of addressing. The 16-bit address in this register takes part in the calculation of effective addresses. This address may be used to point to data directly or may be modified by an optional constant or register offset. During some indexed modes, the contents of the index register are incremented and decremented to point to the next item of tabular type data. All four pointer registers (X, Y, U, S) may be used as index registers.
The hardware stack pointer (S) is used automatically by the processor during subroutine calls and interrupts. The user stack pointer (U) is controlled exclusively by the programmer. This allows arguments to be passed to and from subroutines with ease. The U register is frequently used as a stack marker. Both stack pointers have the same indexed mode addressing capabilities as the X and Y registers, but also support push and pull instructions. This allows the MC6809E to be used efficiently as a stack processor, greatly enhancing its ability to support higher level languages and modular programming.
The stack pointers of the MC6809E point to the top of the stack in contrast to the MC6800 stack pointer, which pointed to the next free location on stock.
The program counter is used by the processor to point to the address of the next instruction to be executed by the processor. Relative addressing is provided allowing the program counter to be used like an index register in some situations.
The condition code register defines the state of the processor at any given time. See Figure 5
FIGURE 5 - CONDITION CODE REGISTER FORMAT
7 6 5 4 3 2 1 0 E F H I N Z V C | | | | | | | + Carry | | | | | | + - Overflow | | | | | + - - Zero | | | | + - - - Negative | | | + - - - - !IRQ Mask | | + - - - - - Half Carry | + - - - - - - !FIRQ + - - - - - - - Entire Flag
CARRY FLAG (C)
Bit 0 is the carry flag and is usually the carry from the binary ALU. C is also used to represent a "borrow" from subtract like instructions (CMP, NEG, SUB, SBCI and is the complement of the carry from the binary ALU.
OVERFLOW FLAG (V)
Bit 1 is the overflow flag and is set to a one by an operation which causes a signed two's complement overflow. This overflow is detected in an operation in which the carry from the MSB in the ALU does not match the carry from the MSB-1,
ZERO FLAG (Z)
Bit 2 is the zero flag and is set to one if the result of the previous operation was identical to zero.
NEGATIVE FLAG (N)
Bit 3 is the negative flag, which contains exactly the value of the MSB of the result of the preceding operation. Thus, a negative two's complement result will leave N set to a one.
!IRQ MASK (I)
Bit 4 is the !IRQ mask bit. The processor wiII not recognize interrupts from the !IRQ line if this bit is set to a one. !NMI, !IRQ, !FIRQ, !RESET and SWI set I to a one. SWI2 and SWI3 do not affect I.
HALF CARRY (H)
Bit 5 is the half-carry bit, and is used to indicate a carry from bit 3 in the ALU as a result of an 8-bit addition only (ADC or ADD). This bit is used by the DAA instruction to perform a BCD decimal add adjust operation. The state of this flag is undefined in all subtract-like instructions.
!FIRQ MASK (F)
Bit 6 is the !FIRQ mask bit. The processor wiII not recognize interrupts from the F!IRQ line if this bit is set to a one. !NMI, !FIRQ, !RESET and SWI set F to a one. !IRQ, SWI2 and SWI3 do not affect I.
ENTIRE FLAG (E)
Bit 7 is the entire flag, and when set to a one indicates that the complete machine state (all the registers) was stacked, as opposed to the subset state (PC and CC). The E bit of the stacked CC is used on a return from interrupt (RTI) to determine the extent of the unstacking. Therefore, the current E left in the condition code register represents past action.